The following will describe a flash memory as a representative example of conventional nonvolatile memories.
In this flash memory, as shown in FIG. 41, a floating gate 902, an insulation film 907 and a word line (control gate) 903 are formed in this order via a gate insulation film 908 on a semiconductor substrate 901, and a source line 904 and a bit line 905 are formed on both sides of the floating gate 902, constituting a memory cell. Around this memory cell are formed element isolation regions 906 (refer to Japanese Patent Laid-Open Publication No. HEI 5-304277).
The flash memory cell retains storage as the quantity of charge in the floating gate 902. In the memory cell array constructed by arranging the memory cells, the desired memory cell can be subjected to rewrite and read operations by selecting the specified word line and bit line and applying a prescribed voltage to the lines.
FIG. 42 schematically shows a drain current (Id) vs. gate voltage (Vg) characteristic when the quantity of charges in the floating gate 902 changes. As the quantity of charges in the floating gate increases, the threshold voltage increases, and the Id-Vg curve is displaced roughly parallel in a direction in which the gate voltage Vg increases with respect to same drain current Id, resulting in a curve shown in broken line.
However, in the aforementioned conventional flash memory that has the floating gate between the word line (gate electrode) and the channel region, because it is necessary to prevent leakage of electric charges from the floating gate 902, it has been difficult to reduce the thickness of an insulation film 907 that isolates the floating gate 902 from the word line 903 and an insulation film 908 that isolate the floating gate 902 from the channel region. Therefore, it has been difficult to reduce the thickness of a practically gate insulation film, and this has hindered the miniaturization of the memory cell.